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UM0404 XBUS pulse width modulation module
18 XBUS pulse width modulation module
A second Pulse Width Modulation (XPWM) Module is implemented on ST10F276. It is
mapped on XBUS interface (Address range 00’EC00h-00’ECFFh) and generates up to four
additional independent PWM signals. The minimum PWM signal frequency depends on the
width (16 bits) and the resolution (CLK/1 or CLK/64) of the XPWM timers. The maximum
PWM signal frequency assumes that the PWM output signal changes with every cycle of the
respective timer. In a real application, the maximum PWM frequency will depend on the
required resolution of the PWM output signal.
The pulse width modulation module has four independent PWM channels. Each channel
has a 16-bit up/down counter XPTx, a 16-bit period register XPPx with a shadow latch, a 16-
bit pulse width register XPWx with a shadow latch, two comparators, and the necessary
control logic.
The main differences between PWM and XPWM are restricted to the programming model
and interrupt management, due to the constraints imposed by the XBUS with respect to the
standard ST10 peripheral bus (registers are not bit addressable, XBUS interrupt channels
sharing with other X-Peripherals). In terms of general functionality and performance, the two
modules are completely equivalent.
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