Figure 75. SFRs and port pins associated with timer block GPT1
Ports & Direction Control Alternate Functions Data Registers
15
-
14
-
13
-
12
-
11
-
10
-
9
-
8
-
7
Y
6
Y
5
Y
4
Y
3
Y
2
-
1
-
0
-ODP3 E T2
15
Y
14
Y
13
Y
12
Y
11
Y
10
Y
9
Y
8
Y
7
Y
6
Y
5
Y
4
Y
3
Y
2
Y
1
Y
0
Y
----
- - - - YYYYY - - -DP3
----
- - - - YYYYY - - -P3
YY - -
- - ----------P5
T3 YYYY
Y Y YYYYYYYYYY
T4 YYYY
Y Y YYYYYYYYYY
Control Registers Interrupt Control
15
Y
14
Y
13
Y
12
Y
11
Y
10
Y
9
Y
8
Y
7
Y
6
Y
5
Y
4
Y
3
Y
2
Y
1
Y
0
YT2CON
YYYY
Y Y YYYYYYYYYYT3CON
YYYY
Y Y YYYYYYYYYYT4CON
1514131211109876543210
T2IC
----
- - - - YYYYYYYYT3IC
T2 GPT1 Timer 2 Register
T3 GPT1 Timer 3 Register
T4 GPT1 Timer 4 Register
T2IC GPT1 Timer 2 Interrupt Control Register
T3IC GPT1 Timer 3 Interrupt Control Register
T4IC GPT1 Timer 4 Interrupt Control Register
T2IN/P3.7 T2EUD/P5.15
T3IN/P3.6 T3EUD/P3.4
T4IN/P3.5 T4EUD/P5.14
T3OUT/P3.3
ODP3 Port3 Open Drain Control Register
DP3 Port3 Direction Control Register
P3 Port3 Data Register
T2CON GPT1 Timer 2 Control Register
T3CON GPT1 Timer 3 Control Register
T4CON GPT1 Timer 4 Control Register
----- - - - YYYYYYYYT4IC
----
- - - - YYYYYYYY
Bit is linked to a function
Bit has no function or is not implemented
Register is in ESFR internal memory space
Y
-
E
:
:
: