ST ST10F276E - CAN Application; Management of Message Objects

CAN modules UM0404
444/564 DocID13284 Rev 2
These registers hold the IntPnd bits of the 32 Message Objects. By reading out the IntPnd
bits, the CPU can check for which Message Object an interrupt is pending. The IntPnd bit of
a specific Message Object can be set/reset by the CPU via the IFx Message Interface
Registers or by the Message Handler after reception or after a successful transmission of a
frame. This will also affect the value of IntId in the Interrupt Register.
Message valid registers
CAN1MV1 (EFB0h) XBUS Reset Value: 0000h
CAN2MV1 (EEB0h) XBUS Reset Value: 0000h
CAN1MV2 (EFB2h) XBUS Reset Value: 0000h
CAN2MV2 (EEB2h) XBUS Reset Value: 0000h
These registers hold the MsgVal bits of the 32 Message Objects. By reading out the MsgVal
bits, the CPU can check which Message Object is valid. The MsgVal bit of a specific
Message Object can be set/reset by the CPU via the IFx Message Interface Registers.
21.9 CAN application
21.9.1 Management of message objects
The configuration of the Message Objects in the Message RAM will (with the exception of
the bits MsgVal, NewDat, IntPnd, and TxRqst) not be affected by resetting the chip. All the
Message Objects must be initialized by the CPU or they must be not valid (MsgVal = ‘0’)
and the bit timing must be configured before the CPU clears the Init bit in the CAN Control
Register.
Bit Function
IntPnd(32:1)
Interrupt Pending Bits (of all Message Objects)
’0’: This message object is not the source of an interrupt.
’1’: This message object is the source of an interrupt.
1514131211109876543210
MsgVal(16:1)
R
1514131211109876543210
MsgVal(32:17)
R
Bit Function
MsgVal(32:1)
Message Valid Bits (of all Message Objects)
’0’: This Message Object is ignored by the Message Handler.
’1’: This Message Object is configured and should be considered by the Message
Handler.