ST ST10F276E - X-Registers Ordered by Address; Table 73. X-Registers Ordered by Address

Register set UM0404
536/564 DocID13284 Rev 2
Note: 1. The RTCCON reset value is: 0000 000x 0000 0000b.
26.6 X-Registers ordered by address
The following table lists all X-Bus registers which are implemented in the ST10F276 ordered
by their physical address. The Flash control registers are listed in a separate section, in
spite of they are also physically mapped on X-Bus memory space. Note that all X-Registers
are not bit-addressable.
XSSCCONCLR E804h XSSC Clear Control Register (write only) 0000h
XSSCCONSET E802h XSSC Set Control Register (write only) 0000h
XSSCPORT E880h XSSC Port Control Register 0000h
XSSCRB E808h XSSC Receive Buffer xxxxh
XSSCTB E806h XSSC Transmit Buffer 0000h
Table 72. X-Registers ordered by name (continued)
Name Physical address Description
Reset
value
Table 73. X-Registers ordered by address
Name Physical address Description
Reset
value
XSSCCON E800h XSSC Control Register 0000h
XSSCCONSET E802h XSSC Set Control Register (write only) 0000h
XSSCCONCLR E804h XSSC Clear Control Register (write only) 0000h
XSSCTB E806h XSSC Transmit Buffer 0000h
XSSCRB E808h XSSC Receive Buffer xxxxh
XSSCBR E80Ah XSSC Baud Rate Register 0000h
XSSCPORT E880h XSSC Port Control Register 0000h
XS1CON E900h XASC Control Register 0000h
XS1CONSET E902h XASC Set Control Register (write only) 0000h
XS1CONCLR E904h XASC Clear Control Register (write only) 0000h
XS1BG E906h
XASC Baud Rate Generator Reload
Register
0000h
XS1TBUF E908h XASC Transmit Buffer Register 0000h
XS1RBUF E90Ah XASC Receive Buffer Register - xxxh
XS1PORT E980h XASC Port Control Register 0000h
I2CCR EA00h I2C Control Register 0000h
I2CSR1 EA02h I2C Status Register 1 0000h
I2CSR2 EA04h I2C Status Register 2 0000h
I2CCCR1 EA06h I2C Clock Control Register 1 0000h