ST ST10F276E - Figure 89. Sfrs and Port Pins Associated with Timer Block GPT2

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UM0404 The general purpose timer units
Figure 89. SFRs and port pins associated with timer block GPT2
Ports & Direction Control Alternate Functions Data Registers
15
-
14
-
13
-
12
-
11
-
10
-
9
-
8
-
7
-
6
-
5
-
4
-
3
-
2
Y
1
Y
0
-ODP3 E T5
15
Y
14
Y
13
Y
12
Y
11
Y
10
Y
9
Y
8
Y
7
Y
6
Y
5
Y
4
Y
3
Y
2
Y
1
Y
0
Y
----
- - -------YY-DP3
----
- - -------YY-P3
--YY
YY----------P5
T6 YYYY
Y Y YYYYYYYYYY
CAPRELYYYY
Y Y YYYYYYYYYY
Control Registers Interrupt Control
15
Y
14
Y
13
Y
12
Y
11
Y
10
Y
9
Y
8
Y
7
Y
6
Y
5
Y
4
Y
3
Y
2
Y
1
Y
0
YT5CON
YYYY
Y Y YYYYYYYYYYT6CON
1514131211109876543210
T5IC
----- - - - YYYYYYYYT6IC
----
- - - - YYYYYYYYCRIC
----
- - - - YYYYYYYY
ODP3 Port3 Open Drain Control Register
DP3 Port3 Direction Control Register
P3 Port3 Data Register
P5 Port5 Data Register
T5CON GPT2 Timer 5 Control Register
T6CON GPT2 Timer 6 Control Register
T5IN/P5.13 T5EUD/P5.11
T6IN/P5.12 T6EUD/P5.10
CAPIN/P3.2 T6OUT/P3.1
T5 GPT2 Timer 5 Register
T6 GPT2 Timer 6 Register
CAPREL GPT2 Capture/Reload Register
T5IC GPT2 Timer 5 Interrupt Control Register
T6IC GPT2 Timer 6 Interrupt Control Register
CRIC GPT2 CAPREL Interrupt Control Register
Bit is linked to a function
Bit has no function or is not implemented
Register is in ESFR internal memory space
Y
-
E
:
:
: