ST ST10F276E - MAC Operation; Figure 16. MAC Architecture

DocID13284 Rev 2 83/564
UM0404 Multiply-accumulate unit (MAC)
Program control
• Repeat Unit allowing some MAC co-processor instructions to be repeated up to 8192
times. Repeated instructions may be interrupted.
• MAC interrupt (Class B Trap) on MAC condition flags.
4.2 MAC operation
Figure 16. MAC architecture
1. * Shared with standard ALU.
Operand 2Operand 1
Control Unit
Repeat Unit
ST10 CPU
Interrupt
Controller
MSW
MRW
MAH MAL
MCW
Flags MAE
Mux
8-bit Left/Right
Shifter
Mux
Mux
Sign Extend
16 x 16
Concatenation
signed/unsigned
Multiplier
40-bit Signed Arithmetic Unit
0h 0h08000h
40
16
40 40
32 32
16
40
40
40
40
40
Scaler
AB
40
GPR Pointers *
IDX0 Pointer
IDX1 Pointer
QR0 GPR Offset Register
QR1 GPR Offset Register
QX0 IDX Offset Register
QX1 IDX Offset Register
Data
Limiter
(MA-bus) (MB-bus)