ST ST10F276E - Table 32. Definition of XBUS Address Areas

The external bus interface UM0404
208/564 DocID13284 Rev 2
The register functionality is the same as the one of ADDRSELx registers used for external
address range selection. However, it is a protected register and it can only be written before
EINIT instruction execution. Note that the range start address can be only on boundaries
specified by the selected range size. The following table gives a definition of Range Size
Selection and Range Start Address.
Upon Reset, XADRS3 register is programmed so that address range 08’0000h-0F’FFFFh is
accessed with the internal XBUS chip select. The range 08’0000h-08’FFFFh is overlapped
by IFLASH memory space, which have higher priority on XBUS space.
The address range defined by XADRS3 can be reduced by reprogramming it before EINIT
execution: the area which is no longer inside the new address range becomes external
memory space (again, apart from range 08’0000h-08’FFFFh dedicated to IFLASH, as long
as ROMEN bit in SYSCON register is set). The address range defined by XADRS3 has
priority over any external address range defined through ADDRSELx (x = 1...4) registers.
An example of XADRS3 modification with respect to the default (Figure 72) value is shown
in Figure 73: a portion of XFLASH (Bank 2) is no longer available, and all accesses to
memory range 09’0000h-0B’FFFFh are redirected to external memory.
Visibility of XBUS peripherals
In order to keep the ST10F276 compatible with the ST10F269, the XBUS peripherals can
be selected to be visible and / or accessible on the external address / data bus. Different bits
for X-peripheral enabling in XPERCON register must be set. If these bits are cleared before
the global enabling with XPEN-bit in SYSCON register, the corresponding address space,
Bit Function
RGSZ
Range Size Selection
Defines the size of the address area controlled by the respective XBCONx/XADRSx
register pair. See Table 32.
RGSAD
Range Start Address
Defines the upper bit of the start address (A19...) of the respective address area.
See Table 32.
Table 32. Definition of XBUS address areas
Bit-field RGSZ Resulting window size Relevant bit (R) of start address (A19...A8)
0 0 0 0
0 0 0 1
0 0 1 0
0 0 1 1
0 1 0 0
0 1 0 1
0 1 1 0
0 1 1 1
1 0 0 0
1 0 0 1
1 0 1 0
1 0 1 1
1 1 x x
256 bytes
512 bytes
1
Kbyte
2 Kbytes
4 Kbytes
8 Kbytes
16 Kbytes
32 Kbytes
64 Kbytes
128 Kbytes
256 Kbytes
512 Kbytes
Reserved
A19 A8
RRRRRRRRRRRR
RRRRRRRRRRRx
RRRRRRRRRRx x
RRRRRRRRRx x x
RRRRRRRRx x x x
RRRRRRRx x x x x
RRRRRRxxxxxx
RRRRRxxxxxxx
RRRRxxxxxxxx
RRRxxxxxxxxx
RRxxxxxxxxxx
Rxxxxxxxxxxx