ST ST10F276E - A;D Converter Interrupt Control; Table 56. ADC Sampling and Conversion Timing

Analog / digital converter UM0404
382/564 DocID13284 Rev 2
A complete conversion time includes the conversion itself, the sample time and the time
required to transfer the digital value to the result register.
Note: The total conversion time is compatible with the formula valid for ST10F269, while the
meaning of the bit fields ADCTC and ADSTC is no longer compatible: the minimum
conversion time is 388 TCL, which at 40 MHz CPU frequency corresponds to 4.85µs (see
ST10F269).
ST10F276 can target a maximum CPU frequency of 64 MHz. This means that the minimum
conversion time is around 3µs.
19.3 A/D converter interrupt control
At the end of each conversion, interrupt request flag ADCIR in interrupt control register
ADCIC is set. This end-of-conversion interrupt request may cause an interrupt to vector
ADCINT, or it may trigger a PEC data transfer which reads the conversion result from
register ADDAT it can be stored it into a table in the on-chip RAM for later evaluation.
The interrupt request flag ADEIR in register ADEIC will be set, either if a conversion result
overwrites a previous value in register ADDAT (error interrupt in standard mode), or if the
result of an injected conversion has been stored into ADDAT2 (end-of-injected-conversion
interrupt). This interrupt request may be used to cause an interrupt to vector ADEINT, or it
may trigger a PEC data transfer.
ADCIC (FF98h / CCh) SFR Reset Value: - - 00h
Table 56. ADC sampling and conversion timing
ADCTC ADSTC Sample Comparison Extra
Total
conversion
00 00 TCL * 120 TCL * 240 TCL * 28 TCL * 388
00 01 TCL * 140 TCL * 280 TCL * 16 TCL * 436
00 10 TCL * 200 TCL * 280 TCL * 52 TCL * 532
00 11 TCL * 400 TCL * 280 TCL * 44 TCL * 724
11 00 TCL * 240 TCL * 480 TCL * 52 TCL * 772
11 01 TCL * 280 TCL * 560 TCL * 28 TCL * 868
11 10 TCL * 400 TCL * 560 TCL * 100 TCL * 1060
11 11 TCL * 800 TCL * 560 TCL * 52 TCL * 1444
10 00 TCL * 480 TCL * 960 TCL * 100 TCL * 1540
10 01 TCL * 560 TCL * 1120 TCL * 52 TCL * 1732
10 10 TCL * 800 TCL * 1120 TCL * 196 TCL * 2116
10 11 TCL * 1600 TCL * 1120 TCL * 164 TCL * 2884
1514131211109876543210
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ADC
IR
ADC
IE
ILVL GLVL
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