Architectural overview UM0404
34/564 DocID13284 Rev 2
Byte write operations to word wide SFRs via indirect or direct 16-bit (mem) addressing or
byte transfers via the PEC, force zeros in the non-addressed byte. Byte write operations via
short 8-bit (reg) addressing can only access the low byte of an SFR and force zeros in the
high byte. It is therefore recommended, to use the bit-field instructions (BFLDL and BFLDH)
to write to any number of bit in either byte of an SFR without disturbing the non-addressed
byte and the unselected bit.
Reserved bit: some of the bits which are contained in the ST10F276's SFRs are marked as
'Reserved'. User software must write '0's to reserved bits.
These bits are currently not implemented and may be used in future products to invoke new
functions. In this case, the active state for these functions will be '1', and the inactive state
will be '0'. Therefore writing only ‘0’s to reserved locations provides portability of the current
software to future devices. Read accesses to reserved bits return ‘0’s.
1.4.4 Parallel ports
The ST10F276 provides up to 111 I/O lines which are organized into eight input/output ports
and one input port. All port lines are bit-addressable, and all input/output lines are
individually (bit wise) programmable as inputs or outputs via direction registers. The I/O
ports are true bidirectional ports which are switched to high impedance state when
configured as inputs.
The output drivers of three I/O ports can be configured (pin by pin) for push-pull operation or
open-drain operation via control registers. During the internal reset, all port pins are
configured as inputs.
All pins of I/O ports also support an alternate programmable function:
• PORT0 and PORT1 may be used as data and address lines respectively when
accessing external memory. Four CAPCOM2 input-only lines and additional ADC
channels are also mapped on this port.
• Port2, accepts the fast external interrupt inputs and provides inputs/outputs for
CAPCOM1 unit.
• Port3 includes the alternate functions of timers, serial interfaces, the optional bus
control signal BHE
and the system clock output (CLKOUT).
• Port4 outputs the additional segment address bit A16 to A23 in systems where
segmentation is enabled to access more than 64 Kbytes of memory. CAN modules and
I
2
C serial interface are alternate function on this port also.
• Port5 is used as analog input channels of the A/D converter or as timer control signals.
• Port6 provides optional bus arbitration signals (BREQ
, HLDA, HOLD), chip select
signals and XSSC signals.
• Port7 provides the output signals from the PWM unit and inputs/outputs for the
CAPCOM2 unit.
• Port8 provides inputs/outputs for the CAPCOM2 unit, for the XPWM and for the XASC.
All port lines that are not used for alternate functions may be used as general purpose I/O
lines.
1.4.5 Serial channels
Serial communication with other microcontrollers, processors, terminals or external
peripheral components is provided by four serial interfaces with different functionality: two
To Next Page
Loading...
