DocID13284 Rev 2 545/564
UM0404 System programming
27 System programming
Constructs for modularity, loops, and context switching have been built into the ST10F276
instruction set. Many commonly used instruction sequences have been simplified. The
following programming features are available to the programmer.
Instructions provided as subsets of instructions
In many cases, instructions found in other microcontrollers are provided as subsets of more
powerful instructions in the ST10F276.
This provides the same functionality, while decreasing the hardware requirement and
decreasing decode complexity. These instructions can be built in macros to aid assembly
programming.
Directly substitutable instructions are known instructions from other microcontrollers that
can be replaced by the following instructions of the ST10F276:
Modification of system flags is performed by using bit set or bit clear instructions (BSET,
BCLR). All bit and word instructions can access the PSW register, so no instructions like
CLEAR CARRY or ENABLE INTERRUPTS are required.
External memory data access does not require special instructions to load data pointers or
explicitly load and store external data.
The ST10F276 provides a unified memory architecture and its on-chip hardware
automatically detects accesses to IRAM, GPRs, and SFRs.
Multiplication and division
Multiplication and division of words and double words is provided through multiple cycle
instructions implementing a Booth algorithm. Each instruction implicitly uses the 32-bit
register MD (MDL = lower 16 bits, MDH = upper 16 bits).
The MDRIU flag (Multiply or Divide Register In Use) in register MDC is set whenever either
half of this register is written to or when a multiply/divide instruction is started. It is cleared
whenever the MDL register is read.
Because an interrupt can be acknowledged before the contents of register MD are saved,
this flag is required to alert interrupt routines, which require the use of the multiply/divide
hardware, so they can preserve register MD.
This register, however, only needs to be saved when an interrupt routine requires use of the
MD register and a previous task has not saved the current result. This flag is easily tested
by the Jump-on bit instructions.
Substituted instruction ST10F276 instruction Function
CLR Rn AND Rn, #0h Clear register
CPLB Bit BMOVN Bit, Bit Complement bit
DEC Rn SUB Rn, #1h Decrement register
INC Rn ADD Rn, #1h Increment register
SWAPB Rn ROR Rn, #8h Swap byte within word
To Next Page
Loading...
