ST ST10F276E - Reception of Messages with FIFO Buffers

CAN modules UM0404
450/564 DocID13284 Rev 2
implicit priority of the Message Objects, the Message Object with the lowest number will be
the first Message Object of the FIFO Buffer. The EoB bit of all Message Objects of a FIFO
Buffer except the last have to be programmed to zero. The EoB bits of the last Message
Object of a FIFO Buffer is set to one, configuring it as the End of the Block.
21.9.8 Reception of messages with FIFO buffers
Received messages with identifiers matching to a FIFO Buffer are stored into a Message
Object of this FIFO Buffer starting with the Message Object with the lowest message
number.
When a message is stored into a Message Object of a FIFO Buffer the NewDat bit of this
Message Object is set. By setting NewDat while EoB is zero the Message Object is locked
for further write accesses by the Message Handler until the CPU has written the NewDat bit
back to zero.
Messages are stored into a FIFO Buffer until the last Message Object of this FIFO Buffer is
reached. If none of the preceding Message Objects is released by writing NewDat to zero,
all further messages for this FIFO Buffer will be written into the last Message Object of the
FIFO Buffer and therefore overwrite previous messages.
Reading from a FIFO buffer
When the CPU transfers the contents of Message Object to the IFx Message Buffer
registers by writing its number to the IFx Command Request Register, the corresponding
Command Mask Register should be programmed the way that bits NewDat and IntPnd are
reset to zero (TxRqst/NewDat = ‘1’ and ClrIntPnd = ‘1’). The values of these bits in the
Message Control Register always reflect the status before resetting the bits.
To assure the correct function of a FIFO Buffer, the CPU should read out the Message
Objects starting at the FIFO Object with the lowest message number. Figure 181 shows how
a set of Message Objects which are concatenated to a FIFO Buffer can be handled by the
CPU.