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UM0404 Interrupt and trap functions
5.6.1 Fast external interrupts
The input pins that may be used for external interrupts are sampled every eight CPU clock
cycles: This means that the external events are scanned and detected in timeframes of
eight CPU clock cycles.
The ST10F276 provides eight interrupt inputs that are sampled every CPU clock cycle so
external events are captured faster than with standard interrupt inputs.
The upper eight pins of Port2 (CC8-15IO on P2.8-P2.15) can individually be programmed to
this fast interrupt mode. In this mode the trigger transition (rising, falling or both) can also be
selected. The External Interrupt Control register EXICON controls this feature for all eight
pins. In addition, these fast interrupt inputs feature programmable edge detection (rising
edge, falling edge or both edges).
Fast external interrupts may also have interrupt sources selected from other peripherals; for
example the CANx controller receive signal (CANx_RxD) can be used to interrupt the
system. The same is valid for I
2
C interface serial clock line (alternative to CAN2 receive
line), and for Real Time Clock (internally managed). This function is controlled using the
‘External Interrupt Source Selection’ register EXISEL.
The EXxIN pins (P2.8-P2.15) can also be used to exit Power Down mode if bit PWDCFG in
the SYSCON register is set. Power reduction modes are detailed in Section 24: Power
reduction modes on page 502.
EXICON (F1C0h / E0h) ESFR Reset Value: 0000h
These fast external interrupts use the interrupt nodes and vectors of the CAPCOM channels
CC8-CC15, so the capture/compare function cannot be used on the respective Port2 pins
(with EXIxES ≠ 00b). However, general purpose I/O is possible in all cases.
Note: The fast external interrupt inputs are sampled every CPU clock cycles: The interrupt request
arbitration and processing is executed every four CPU clock cycles.
While for CAN and I
2
C the EXICON programming depends on the customer application
(even though inactive state of both CAN and I
2
C protocols is the high level, so a new activity
on the bus can be detected by a falling edge observed at the related pins), for RTC the
internal hardware circuitry is such that the interrupts are generated on the positive edge, so
the EXICON register must be programmed accordingly.
1514131211109876543210
EXI7ES EXI6ES EXI5ES EXI4ES EXI3ES EXI2ES EXI1ES EXI0ES
RW RW RW RW RW RW RW RW
Bit Function
EXIxES
(x=7...0)
External Interrupt x Edge Selection Field (x=3...0)
’00’: Fast external interrupts disabled: standard mode.
EXxIN pin not taken into account for entering/exiting Power Down mode.
’01’: Interrupt on positive edge (rising).
Enter Power Down mode if EXxIN = ‘0’, exit if EXxIN = ‘1’ (ref as ‘high’ active level).
’10’: Interrupt on negative edge (falling).
Enter Power Down mode if EXxIN = ‘1’, exit if EXxIN = ‘0’ (ref as ‘low’ active level).
’11’: Interrupt on any edge (rising or falling).
Always enter Power Down mode, exit if EXxIN level changed.
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