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UM0404 Memory organization
Note: The symbol ‘x’ in the table above stands for ‘do not care’.
Table 2. Segment 8 address range mapping
ROMEN XPEN XRAM2EN XFLASHEN Segment 8
0 0 x x External Memory
0100 External Memory
011x Reserved
01x1 Reserved
1 x x x IFlash (B1F1)
Table 3. 512 Kbyte IFlash memory block organization
Block
Addresses
(ROMS1 = ‘0’)
Addresses
(ROMS1 = ‘1’)
Size (bytes)
B0F0 00’0000h - 00’1FFFh 01’0000h - 00’1FFFh 8K
B0F1 00’2000h - 00’3FFFh 01’2000h - 00’3FFFh 8K
B0F2 00’4000h - 00’5FFFh 01’4000h - 00’5FFFh 8K
B0F3 00’6000h - 00’7FFFh 01’6000h - 00’7FFFh 8K
B0F4 01’8000h - 01’FFFFh 01’8000h - 01’FFFFh 32K
B0F5 02’0000h - 02’FFFFh 02’0000h - 02’FFFFh 64K
B0F6 03’0000h - 03’FFFFh 03’0000h - 03’FFFFh 64K
B0F7 04’0000h - 04’FFFFh 04’0000h - 04’FFFFh 64K
B0F8 05’0000h - 05’FFFFh 05’0000h - 05’FFFFh 64K
B0F9 06’0000h - 06’FFFFh 06’0000h - 06’FFFFh 64K
B1F0 07’0000h - 07’FFFFh 07’0000h - 07’FFFFh 64K
B1F1 08’0000h - 08’FFFFh 08’0000h - 08’FFFFh 64K
Table 4. 320 Kbyte XFlash memory block organization
Block
Addresses
(ROMS1=’0’)
Addresses
(ROMS1=’1’)
Size (bytes)
B2F0 09’0000h - 09’FFFFh 09’0000h - 09’FFFFh 64K
B2F1 0A’0000h - 0A’FFFFh 0A’0000h - 0A’FFFFh 64K
B2F2 0B’0000h - 0B’FFFFh 0B’0000h - 0B’FFFFh 64K
B3F0 0C’0000h - 0C’FFFFh 0C’0000h - 0C’FFFFh 64K
B3F1 0D’0000h - 0D’FFFFh 0D’0000h - 0D’FFFFh 64K
CTRL Registers 0E’0000h - 0E’FFFFh 0E’0000h - 0E’FFFFh 64K