DocID13284 Rev 2 355/564
UM0404 Pulse width modulation module
PWMIC (F17Eh / BFh) ESFR Reset Value: - - 00h
Note: Refer to Section 5.1.3: Interrupt control registers on page 100 for an explanation of the
control fields.
17.4 PWM output signals
The output signals of the four PWM channels (POUT3...POUT0) are alternate output
functions on Port7 (P7.3...P7.0). The output signal of each PWM channel is individually
enabled by control bit PENx in register PWMCON1.
The PWM signals are XORed with the respective port latch outputs before being driven to
the port pins.
This allows driving the PWM signal directly to the port pin (P7.x = ‘0’) or drive the inverted
PWM signal (P7.x = ‘1’) (see Figure 150).
Note: Using the open-drain mode on Port7 allows the combination of two or more PWM outputs
through a AND-Wired configuration, using an external pull-up device. This provides sort of a
burst mode for any PWM channel.
Software control of the PWM outputs
In an application the PWM output signals are generally controlled by the PWM module.
However, it may be necessary to influence the level of the PWM output pins via software
either to initialize the system or to react on some extraordinary condition, like a system fault
or an emergency.
Clearing the timer run bit PTRx stops the associated counter and leaves the respective
output at its current level.
The individual PWM channel outputs are controlled by comparators according to the
formula:
PWM output signal = [PTx] >
[PWx shadow latch].
So whenever software changes registers PTx, the respective output will reflect the condition
after the change. Loading timer PTx with a value greater than or equal to the value in PWx
immediately sets the respective output, a PTx value below the PWx value clears the
respective output.
By clearing or setting the respective Port7 output latch the PWM channel signal is driven
directly or inverted to the port pin.
Clearing the enable bit PENx disconnects the PWM channel and switches the respective
port pin to the value in the port output latch.
Note: To prevent further PWM pulses from occurring after such a software intervention the
respective counter must be stopped first.
1514131211109876543210
--------
PWM
IR
PWM
IE
ILVL GLVL
RW RW RW RW