DocID13284 Rev 2 531/564
UM0404 Register set
26.5 X-Registers ordered by name
The following table lists all X-Bus registers which are implemented in the ST10F276 ordered
by their name. The Flash control registers are listed in a separate section, in spite of they
are also physically mapped on X-Bus memory space. Note that all X-Registers are not bit-
addressable.
P2b FFC0h E0h Port2 Register 0000h
DP2b FFC2h E1h Port2 Direction Control Register 0000h
P3b FFC4h E2h Port3 Register 0000h
DP3b FFC6h E3h Port3 Direction Control Register 0000h
P4b FFC8h E4h Port4 Register (8-bit) - - 00h
DP4b FFCAh E5h Port4 Direction Control Register - - 00h
P6b FFCCh E6h Port6 Register (8-bit) - - 00h
DP6b FFCEh E7h Port6 Direction Control Register - - 00h
P7b FFD0h E8h Port7 Register (8-bit) - - 00h
DP7b FFD2h E9h Port7 Direction Control Register - - 00h
P8b FFD4h EAh Port8 Register (8-bit) - - 00h
DP8b FFD6h EBh Port8 Direction Control Register - - 00h
MRW b FFDAh EDh MAC Unit Repeat Word 0000h
MCW b FFDCh EEh MAC Unit Control Word 0000h
MSW b FFDEh EFh MAC Unit Status Word 0200h
Table 71. Special function registers ordered by address (continued)
Name
Physical
address
8-bit
address
Description
Reset
value
Table 72. X-Registers ordered by name
Name Physical address Description
Reset
value
CAN1BRPER EF0Ch CAN1: BRP Extension Register 0000h
CAN1BTR EF06h CAN1: Bit Timing Register 2301h
CAN1CR EF00h CAN1: CAN Control Register 0001h
CAN1EC EF04h CAN1: Error Counter 0000h
CAN1IF1A1 EF18h CAN1: IF1 Arbitration 1 0000h
CAN1IF1A2 EF1Ah CAN1: IF1 Arbitration 2 0000h
CAN1IF1CM EF12h CAN1: IF1 Command Mask 0000h
CAN1IF1CR EF10h CAN1: IF1 Command Request 0001h
CAN1IF1DA1 EF1Eh CAN1: IF1 Data A 1 0000h
CAN1IF1DA2 EF20h CAN1: IF1 Data A 2 0000h