DocID13284 Rev 2 371/564
UM0404 Analog / digital converter
Figure 158. SFRs, XBUS registers and port pins associated with the A/D converter
The external analog reference voltages V
AREF
and V
AGND
are fixed. The separate supply for
the ADC reduces the interference with other digital signals.
The sample time as well as the conversion time is programmable, so the ADC can be
adjusted to the internal resistances of the analog sources and/or the analog reference
voltage supply.
Ports & Direction Control Alternate Functions Data Registers
15
Y
14
Y
13
Y
12
Y
11
Y
10
Y
9
Y
8
Y
7
Y
6
Y
5
Y
4
Y
3
Y
2
Y
1
Y
0
YP5 ADDAT
15
Y
14
Y
13
Y
12
Y
11
-
10
-
9
Y
8
Y
7
Y
6
Y
5
Y
4
Y
3
Y
2
Y
1
Y
0
Y
ADDAT2 E Y Y Y Y
- - YYYYYYYYYY
Control Registers
Interrupt Control
15
Y
14
Y
13
Y
12
Y
11
Y
10
Y
9
Y
8
Y
7
Y
6
-
5
Y
4
Y
3
Y
2
Y
1
Y
0
YADCON
1514131211109876543210
ADCIC ----
- - - - YYYYYYYY
ADEIC - - - -
- - - - YYYYYYYY
AN0/P5.0... AN15/P5.15
P5 Port5 Data Register
P5DIDIS Port5 Analog Inputs Disturb Protection Register
DP1L Port1L Direction Register
P1L Port1L Data Register
XP1DIDISPort1L Analog Inputs Disturb Protection Register (XBUS)
ADDAT A/D Converter Result Register
ADDAT2 A/D Converter Channel Injection Result Register
ADCON A/D Converter Control Register
XMISC Miscellaneous Register (XBUS)
ADCIC A/D Converter Interrupt Control Register
(End of Conversion)
ADEIC A/D Converter Interrupt Control Register
(Overrun Error / Channel Injection)
Bit is linked to a function
Bit has no function or is not implemented
Register is in ESFR internal memory space
Y
-
E
:
:
:
DP1L
P1L
15
-
14
-
13
-
12
-
11
-
10
-
9
-
8
Y
7
Y
6
Y
5
Y
4
Y
3
Y
2
Y
1
Y
0
Y
----
- - - YYYYYYYYY
AN16/P1L.0... AN23/P1L.7
YYYY
Y Y YYYYYYYYYYP5DIDIS
XP1DIDIS
----
- - - YYYYYYYYY
----
- - ------YYYYXMISC