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ST ST10F276E - Table 26. Port6 Alternate Functions; Figure 46. Port6 I;O and Alternate Functions

ST ST10F276E
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Parallel ports UM0404
166/564 DocID13284 Rev 2
Figure 46. Port6 I/O and alternate functions
The chip select lines of Port6 have an internal weak pull-up device. This device is switched
on under the following conditions:
Always during reset
If the Port6 line is used as a chip select output, and the ST10F276 is in Hold mode
(invoked through HOLD
pin), and the respective pin driver is in push-pull mode
(ODP6.x = ‘0’).
This feature is implemented to drive the chip select lines high during reset in order to avoid
multiple chip selection, and to allow another master to access the external memory via the
same chip select lines (AND-wired), while the ST10F276 is in Hold mode.
With ODP6.x = ‘1’ (open-drain output selected), the internal pull-up device will not be active
during Hold mode; external pull-up devices must be used in this case. When entering Hold
mode the CS
lines are actively driven high for one clock phase, then the output level is
controlled by the pull-up devices (if activated).
After reset the CS
function must be used, if selected so. In this case there is no possibility to
program any port latches before. Thus the alternate function (CS
) is selected automatically
in this case.
Table 26. Port6 alternate functions
Port6 pin
Alternate function
CSSEL = 10
Alternate function
CSSEL = 01
Alternate function
CSSEL = 00
Alternate function
CSSEL = 11
P6.0
P6.1
P6.2
P6.3
P6.4
General purpose I/O
General purpose I/O
General purpose I/O
General purpose I/O
General purpose I/O
Chip select CS0
Chip select CS1
General purpose I/O
General purpose I/O
General purpose I/O
Chip select CS0
Chip select CS1
Chip select CS2
General purpose I/O
General purpose I/O
Chip select CS0
Chip select CS1
Chip select CS2
Chip select CS3
Chip select CS4
P6.5
P6.6
P6.7
HOLD External hold request input / SCLK1
HLDA Hold acknowledge output / MTSR1
BREQ
Bus request output / MRST1
Port6
Alternate Function a)
-
-
-
-
-
-
-
-
P6.7
P6.6
P6.5
P6.4
P6.3
P6.2
P6.1
P6.0
-
-
-
-
-
-
-
-
BREQ
HLDA
HOLD
CS4
CS3
CS2
CS1
CS0
General Purpose Input / Output
b)
-
-
-
-
-
-
-
-
MRST1
MTSR1
SCLK1
CS4
CS3
CS2
CS1
CS0
XSSC
Input/Output
Bus Arbitration

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