ST ST10F276E - Page 260

XBUS asynchronous / synchronous serial interface UM0404
260/564 DocID13284 Rev 2
XS1CONSET (E902h) XBUS Reset Value: 0000h
XS1CONCLR (E904h) XBUS Reset Value: 0000h
A transmission is started by writing to the Transmit Buffer register XS1TBUF (via an
instruction or a PEC data transfer).
Only the number of data bit which is determined by the selected operating mode will actually
be transmitted. Bit written to positions 9 through 15 of register XS1TBUF are always
insignificant. After a transmission has been completed, the transmit buffer register is cleared
to 0000h.
Data transmission is double-buffered, so a new character may be written to the transmit
buffer register, before the transmission of the previous character is complete. This allows
the transmission of characters back-to-back without gaps.
Data reception is enabled by the Receiver Enable bit S1REN. After reception of a character
has been completed, the received data and, if provided by the selected operating mode, the
received parity bit can be read from the (read-only) Receive Buffer register XS1RBUF.
Bit in the upper half of XS1RBUF which are not valid in the selected operating mode will be
read as zeros.
Data reception is double-buffered, so reception of a second character may already begin
before the previously received character has been read out of the receive buffer register.
In all modes, receive buffer overrun error detection can be selected through bit S1OEN.
When enabled, the overrun error status flag S1OE and the error interrupt request flag will be
set when the receive buffer register has not been read by the time reception of a second
character is complete. The previously received character in the receive buffer is overwritten.
The Loop-Back option (selected by bit S1LB) allows the data currently being transmitted to
be received simultaneously in the receive buffer.
This may be used to test serial communication routines at an early stage without having to
provide an external network. In loop-back mode the alternate input/output functions of the
Port8 pins are not necessary.
1514131211109876543210
SET.1
5
SET.1
4
SET.1
3
SET.1
2
-
SET.1
0
SET.9 SET.8 SET.7 SET.6 SET.5 SET.4 SET.3 SET.2 SET.1 SET.0
WWWW WWWWWWWWWWW
Bit Function
SET.y
Writing a ‘1’ will set the corresponding bit in XS1CON register.
Writing a ‘0’ has no effect.
1514131211109876543210
CLR.
15
CLR.
14
CLR.
13
CLR.
12
-
CLR.
10
CLR.
9
CLR.
8
CLR.
7
CLR.
6
CLR.
5
CLR.
4
CLR.
3
CLR.
2
CLR.
1
CLR.
0
WWWW WWWWWWWWWWW
Bit Function
CLR.y
Writing a ‘1’ will clear the corresponding bit in XS1CON register.
Writing a ‘0’ has no effect.