ST ST10F276E - Page 301

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UM0404 Watchdog timer
Short hardware reset
(Synchronous)
(1)
1 0 N Synch. max (4TCL, 500ns) 1032TCL 0 0 1 1 0
1 1 N Synch. max (4TCL, 500ns) 1032TCL 0 0 1 1 0
1 0 Y Synch.
max (4TCL, 500ns) 1032TCL
00110
Activated by internal logic for 1024TCL
1 1 Y Synch.
max (4TCL, 500ns) 1032TCL
00110
Activated by internal logic for 1024TCL
Long Hardware
Reset
(Synchronous)
1 0 N Synch. 1032TCL - 0 1 1 1 0
1 1 N Synch. 1032TCL - 0 1 1 1 0
1 0 Y Synch.
1032TCL -
01110
Activated by internal logic only for 1024TCL
1 1 Y Synch.
1032TCL -
01110
Activated by internal logic only for 1024TCL
Software Reset
(2)
x 0 N Synch. Not activated 0 0 0 1 0
x 0 N Synch. Not activated 0 0 0 1 0
0 1 Y Synch. Not activated 0 0 0 1 0
1 1 Y Synch. Activated by internal logic for 1024TCL 0 0 0 1 0
Watchdog Reset
(2)
x 0 N Synch. Not activated 0 0 0 1 1
x 0 N Synch. Not activated 0 0 0 1 1
0 1 Y Synch. Not activated 0 0 0 1 1
1 1 Y Synch. Activated by internal logic for 1024TCL 0 0 0 1 1
1. It can degenerate into a long hardware reset and consequently differently flagged (see Section 24.3 for details).
2. When bidirectional is active (and with RPD
= 0), it can be followed by a short hardware reset and consequently differently
flagged (see Section 23.6: Bidirectional reset for details).
Table 44. Reset events summary (continued)
Event
RPD
EA
Bidir
Synch.
Asynch.
RSTIN WDTCON Flags
min max
PONR
LHWR
SHWR
SWR
WDTR