Analog / digital converter UM0404
374/564 DocID13284 Rev 2
Bit-field ADCH specifies the analog input channel which is to be converted (first channel of a
conversion sequence in auto scan modes): according to the value of bit ADCMUX in XMISC
register, a channel on Port5 or Port1L is selected. Bit-field ADM selects the operating mode
of the A/D converter. A conversion (or a sequence) is then started by setting bit ADST.
Clearing ADST stops the A/D converter after a certain operation which depends on the
selected operating mode.
The busy flag (read-only) ADBSY is set, as long as a conversion is in progress. After reset,
this bit is set because the self-calibration is on-going (duration of self-calibration depends on
CPU clock: it takes up to 40.629 ± 1 clock pulses). You must poll this bit to know when the
first conversion can be launched.
The result of a conversion is stored in the result register ADDAT, or in register ADDAT2 for
an injected conversion.
Note: Bit-field CHNR of register ADDAT is loaded by the ADC to indicate which channel the result
refers to. Bit-field CHNR of register ADDAT2 is loaded by the CPU to select the analog
channel, which is to be injected.
ADDAT (FEA0h / 50h) SFR Reset Value: 0000h
Bit Function
ADCH ADC Analog Channel Input Selection
ADM
ADC Mode Selection
’0 0’: Fixed Channel Single Conversion
’0 1’: Fixed Channel Continuous Conversion
’1 0’: Auto Scan Single Conversion
’1 1’: Auto Scan Continuous Conversion
ADOFF
ADC Disable
‘0’: Analog circuitry of A/D converter is on: it can be used properly
‘1’: Analog circuitry of A/D converter is turned off (no consumption): non conversion
possible
ADST ADC Start bit
ADBSY
ADC Busy Flag
’1’: a conversion or calibration is active
ADWR ADC Wait for Read Control
ADCIN ADC Channel Injection Enable
ADCRQ ADC Channel Injection Request Flag
ADSTC ADC Sample Time Control
(1)
1. ADSTC and ADCTC control the conversion timing. Refer to Section 20.2.
ADCTC ADC Conversion Time Control
(1)
1514131211109876543210
CHNR - - ADRES
RW RW
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