DocID13284 Rev 2 455/564
UM0404 CAN modules
is an example of a minor error in the bit timing configuration (Prop_Seg too short) that
causes sporadic bus errors.
Some CAN implementations provide an optional 3 Sample Mode: the C-CAN does not. In
this mode, the CAN bus input signal passes a digital low-pass filter, using three samples and
a majority logic to determine the valid bit value. This results in an additional input delay of 1
t
q
, requiring a longer Prop_Seg.
Phase buffer segments and synchronization
The Phase Buffer Segments (Phase_Seg1 and Phase_Seg2) and the Synchronization
Jump Width (SJW) are used to compensate for the oscillator (or PLL) tolerance. The Phase
Buffer Segments may be lengthened or shortened by synchronization.
Synchronizations occur on edges from recessive to dominant, their purpose is to control the
distance between edges and Sample Points.
Edges are detected by sampling the actual bus level in each time quantum and comparing it
with the bus level at the previous Sample Point. A synchronization may be done only if a
recessive bit was sampled at the previous Sample Point and if the actual time quantum’s
bus level is dominant.
An edge is synchronous if it occurs inside of Sync_Seg, otherwise the distance between
edge and the end of Sync_Seg is the edge phase error, measured in time quanta. If the
edge occurs before Sync_Seg, the phase error is negative, else it is positive.
Two types of synchronization exist: Hard Synchronization and Resynchronization. A Hard
Synchronization is done once at the start of a frame; inside a frame only Resynchronizations
occur.
• Hard synchronization
After a hard synchronization, the bit time is restarted with the end of Sync_Seg,
regardless of the edge phase error. Thus hard synchronization forces the edge which
has caused the hard synchronization to lie within the synchronization segment of the
restarted bit time.
• Bit resynchronization
Resynchronization leads to a shortening or lengthening of the bit time such that the
position of the sample point is shifted with regard to the edge.
When the phase error of the edge which causes Resynchronization is positive,
Phase_Seg1 is lengthened. If the magnitude of the phase error is less than SJW,
Phase_Seg1 is lengthened by the magnitude of the phase error, else it is lengthened
by SJW.
When the phase error of the edge which causes Resynchronization is negative,
Phase_Seg2 is shortened. If the magnitude of the phase error is less than SJW,
Phase_Seg2 is shortened by the magnitude of the phase error, else it is shortened by
SJW.
When the magnitude of the phase error of the edge is less than or equal to the programmed
value of SJW, the results of Hard Synchronization and Resynchronization are the same. If
the magnitude of the phase error is larger than SJW, the Resynchronization cannot
compensate the phase error completely, an error of (phase error - SJW) remains.
Only one synchronization may be done between two Sample Points. The Synchronizations
maintain a minimum distance between edges and Sample Points, giving the bus level time
to stabilize and filtering out spikes that are shorter than (Prop_Seg + Phase_Seg1).
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