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ST ST10F276E
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DocID13284 Rev 2 53/564
UM0404 The central processing unit (CPU)
Beside its normal operation there are the following particular CPU states:
RESET state: Any reset (hardware, software, watchdog) forces the CPU into a pre-
defined active state.
IDLE state: The clock signal to the CPU itself is switched off, while the clocks for the
on-chip peripherals keep running.
POWER DOWN state: All of the on-chip clocks are switched off.
A transition into an active CPU state is forced by an interrupt (if being IDLE) or by a reset (if
being in POWER DOWN mode).
The IDLE, POWER DOWN and RESET states can be entered by particular ST10F276
system control instructions. A set of Special Function Registers is dedicated to the functions
of the CPU core:
General System Configuration: SYSCON (RP0H)
CPU Status Indication and Control: PSW
Code Access Control: IP, CSP
Data Paging Control: DPP0, DPP1, DPP2, DPP3
GPRs Access Control: CP
System Stack Access Control: SP, STKUN, STKOV
Multiply and Divide Support: MDL, MDH, MDC
ALU Constants Support: ZEROS, ONES

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