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UM0404 System programming
When the EA pin is high during reset (default value), the internal Flash is globally enabled
and the first 32 Kbytes are mapped in segment ‘0’. The first instructions are fetched from the
internal Flash from locations 00’0000h.
When the EA
pin is low during reset (ROMEN = 0), the internal Flash is disabled and
external memory is used for startup control.
Mapping the internal Flash area
When internal Flash is disabled on reset the first instructions are fetched from external
memory locations 00’0000h. The Flash memory can later be enabled by setting the ROMEN
bit of SYSCON to 1. The code performing this setting must not run from a segment of the
external memory to be replaced by a segment of the Flash memory, otherwise unexpected
behavior may occur.
For example, if external memory code is located in the first 32 Kbytes of segment 0, the first
32 Kbytes of the Flash must then be enabled in segment 1. This is done by setting the
ROMS1 bit of SYSCON to 0 before or simultaneously with setting of ROMEN bit. This must
be done in the externally supplied program before the execution of the EINIT instruction.
If program execution starts from external memory, but access to the Flash memory mapped
in segment 0 is later required, then the code that performs the setting of ROMEN bit must be
executed either in the segment 0 but above address 00’8000h, or from the on-chip RAM.
Bit ROMS1 only affects the mapping of the first 32 Kbytes of the IFlash memory. All other
parts of the IFlash memory (addresses 01’8000h - 08’FFFFh) remain unaffected.
The SGTDIS Segmentation Disable / Enable must also be set to 0 to allow the use of the full
on-chip Flash memory in addition to the external boot memory. The correct procedure on
changing the segmentation registers must also be observed to prevent an unwanted trap
condition:
• Instructions that configure the internal memory must only be executed from external
memory or from the IRAM.
• An Absolute Inter-Segment Jump (JMPS) instruction must be executed after Flash
enabling, to the next instruction, even if this next instruction is located in the
consecutive address.
• Whenever the internal Memory is disabled, enabled or re-mapped, the DPPs must be
explicitly (re)loaded to enable correct data accesses to the internal memory and/or
external memory.
When starting from external memory, the interrupt/trap vector table, which uses locations
00’0000h through 00’01FFh, of the external memory and may therefore be modified, so the
system software may now change interrupt/trap handlers according to the current condition
of the system.
The internal Flash can still be used for fixed software routines such as I/O drivers, math
libraries, application specific invariant routines, or tables. This combines the advantage of
an integrated non-volatile memory with the advantage of a flexible, adaptable software
system.
Enabling and disabling the internal Flash area after reset
If the internal Flash does not contain an appropriate start-up code, the system may be
booted from external memory, while the internal Flash is enabled afterwards to provide
access such as to library routines or tables.
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