ST ST10F276E - Page 463

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UM0404 CAN modules
In this example, the concatenated bit time parameters are (2-1)
3
& (7-1)
4
& (1-1)
2
& (1-1)
6
,
the Bit Timing Register CANxBTR is programmed to = 0x1600h.
Example for bit timing at low baudrate
In this example, the frequency of CAN module clock is 2 MHz, BRP is 1, the bitrate is 100
Kbit/s.
In this example, the concatenated bit time parameters are (4-1)
3
& (5-1)
4
& (4-1)
2
& (2-1)
6
,
the Bit Timing Register CANxBTR is programmed to = 0x34C1h.
Tolerance for CAN clock 0.39 % =
δ
PLL
(13 x t
BT
= 13 x 10 x t
q
= 130
t
CPU
)
5 ns = Data from PLL jitter characteristics
Tolerance for oscillator (no PLL effect)0.35 % =
t
q
1 μs= 2 x t
CPU
Delay of bus driver 200 ns
Delay of receiver circuit 80 ns
Delay of bus line (40m) 220 ns
t
Prop
1 μs= 1xt
q
t
SJW
4 μs= 4xt
q
t
PB1
4 μs= 4xt
q
t
Seg1
= t
Prop
+ t
PB1
5 μs= 5 x t
q
t
Seg2
= t
PB2
4μs = Information Processing Time + 3 x t
q
= 4 x t
q
t
Sync-Seg
1 μs= 1xt
q
t
BT
10 μs= t
Sync-Seg
+ t
Seg1
+ t
Seg2
= 10 x t
q
Tolerance for CAN clock 1.58 % =
δ
PLL
(13 x t
BT
= 13 x 10 x t
q
= 260 t
CPU
)10 ns = Data from PLL jitter characteristics
Tolerance for oscillator (no PLL effect) 1.57 % =
min t
PB1
t
PB2
(,)
213t
BT
t
PB2
–⋅()⋅
-----------------------------------------------
0.1μs
2131μs 0.2μs–⋅()⋅
---------------------------------------------------=
min t
PB1
t
PB2
(,)2 δ
PLL
⋅–
213t
BT
t
PB2
–⋅()⋅
------------------------------------------------------------------
min t
PB1
t
PB2
(,)
13 t
BT
t
PB2
–⋅()⋅
----------------------------------------------
4μs
21310μs 4μs–⋅(⋅
------------------------------------------------=
min t
PB1
t
PB2
(,)2 δ
PLL
⋅–
213t
BT
t
PB2
–⋅()⋅
------------------------------------------------------------------