ST ST10F276E - Page 563

DocID13284 Rev 2 563/564
UM0404 Revision history
24-Jan-2005 0.6
Sections 10 to 16 re-ordered as in the original version (bad order in
rev. 1.5 only).
Section 7: Dedicated pins on page 179: added V
AREF
and V
AGND
as
dedicated pins in the table.
Section 6.10: Port8: Figure 53 on page 176 updated - unidirectional
arrows on XPWM alternate functions.
Section 6.10: Port8: Figure 53 on page 176 updated - unidirectional
arrows on XPWM alternate functions.
Section Section 15.1: Selection among user-code, standard or
alternate bootstrap on page 302: Decoding of P0L.5 = 1, P0L.4 = 0
description updated.
Section 22: Real time clock on page 464: Introduction updated
clarifying the behavior of "cyclic time based interrupt" bullet.
Section 22: Real time clock on page 464: Description of bit RTCAEN
of RTCCON register updated.
Section 22: Real time clock on page 464: Notes referring to
RTCCON register description updated.
Section 23: System reset on page 472: Some occurences of EA
corrected in EA
.
Section 23.2: Asynchronous reset on page 472: Note in "Power-On
Reset" paragraph updated (missing word added).
Section 26: Register set on page 515: Paragraph titles and table
headers updated for coherency throughout.
Section 26: Register set on page 515: Reset value of IDPROG
register corrected.
Section 26: Register set on page 515: Name of all I
2
C registers
corrected adding prefix "I2C".
16-Feb-2007 0.7
Added Section 4.2.6: The 40-bit signed accumulator register on
page 87.
Table 44 on page 300: Added cross references to footnotes 1 and 2
Section 16.5.1 on page 337: Added cross reference to Double
register compare mode
Section 16.5.2 on page 338: Added cross reference to Double
register compare mode in first note
Table 64 on page 495: Added cross reference to footnote 1
Document format updated
6-Mar-2007 1 Make changes to tables & figures to comply with corporate template.
07-May-2013 2 Updated Chapter 20: I2C interface
Table 77. Document revision history (continued)
Date Revision Changes