I
2
C interface UM0404
406/564 DocID13284 Rev 2
I2CSR2 (EA04h) XBUS Reset Value: 0000h
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
– ENDAD AF STOPF ARLO BERR GCAL
RRRRRR
Bit Function
GCAL
General Call (Slave mode)
This bit is set by hardware when a general call address is detected on the bus while
ENGC
= 1. It is cleared by hardware detecting a Stop condition (STOPF = 1) or
when the interface is disabled (PE
= 0).
‘0’: No general call address detected on bus
‘1’: general call address detected on bus
BERR
Bus Error
This bit is set by hardware when the interface detects a misplaced Start or Stop
condition at falling edge of SCL, or on the second data transition occurring during
the high phase of SCL. An interrupt is generated if ITE
= 1. It is cleared by software
reading I2CSR2 register or by hardware when the interface is disabled (PE
= 0).
The SCL line is not held low while BERR
= 1.
‘0’: No misplaced Start or Stop condition
‘1’: Misplaced Start or Stop condition
ARLO
Arbitration Lost
This bit is set by hardware when the interface loses the arbitration of the bus to
another master. Besides, it is set when a misplaced data transition occurs during the
high phase of SCL. An interrupt is generated if ITE
= 1. It is cleared by software
reading I2CSR2 register or by hardware when the interface is disabled (PE
= 0).
After an ARLO event the interface switches back automatically to Slave mode
(M/SL
= 0).
The SCL line is not held low while ARLO
= 1.
‘0’: No arbitration lost detected
‘1’: Arbitration lost detected
STOPF
Stop Detection (Slave Mode)
This bit is set by hardware when a Stop condition is detected on the bus after an
acknowledge (if ACK
= 1). An interrupt is generated if ITE = 1. It is cleared by
software reading I2CSR2 register or by hardware when the interface is disabled
(PE
= 0).
The SCL line is not held low while STOPF
= 1.
‘0’: No Stop condition detected
‘1’: Stop condition detected
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