Cmsemicon CMS32L051 - 5.3 Registers for controlling general-purpose timer unit

V1.2.2
CMS32L051 User Manual |Chapter 5 Universal Timer Unit (Timer4)
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5.3 Registers for controlling general-purpose timer unit
The registers that control the general-purpose timer unit are as follows:
 Peripheral enable register 0 (PER0).
 Timer clock selection register m (TPSm).
 Timer mode register mn (TMRmn).
 Timer status register mn (TSRmn).
 Timer channel enable status register m (TEm).
 Timer channel start register m (TSm).
 Timer channel stop register m (TTm).
 Timer Input and Output Select Register (TIOS0).
 Timer output enable register m (TOEm).
 Timer output register m (TOm).
 Timer output level register m (TOLm).
 Timer output mode register m (TOMm).
 Noise filter enable register 1 (NFEN1).
 Noise filter enable register 2 (NFEN2).
 Port Mode Control Register (PMCxx).
 Port Mode Register (PMxx).
 Port multiplexing function configuration register (PxxCFG).
Note The allocated registers and bits vary from product to product.
Unassigned bits must be initialized.
Note m: unit number (m=0,1) n: channel number (n=0~3).