Cmsemicon CMS32L051 - EPWM Force Truncated Input Selection Register (EPWMSTC)

V1.2.2
CMS32L051 User Manual |Chapter 6 Function of EPWM Output Control Circuit
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6.2.4 EPWM force truncated input selection register (EPWMSTC)
The EPWMSTC register makes the selection of the input source forced truncation.
The EPWMSTC register is set via 8-bit memory operation instructions.
After the reset signal is generated, the value of this register becomes 00H.
Figure 6-4 Format of EPWM force truncated input selection register (EPWMSTC)
Address: 0x40044404
After reset: 00H
R/W
symbol
7
6
5
4
3
2
1
0
EPWMSTC
0
0
0
REL_SEL
HS_SEL
IN_EG
SC_SEL1
SC_SEL0
SC_SEL1
SC_SEL0
Selection of truncation sources
Note 1, 3, 4
0
0
Do not select
0
1
Do not select
1
0
INTP0 terminal input
1
1
Event input from EVENTC
IN_EG
Source of force truncation/edge selection of force truncation output source
Note 1, 2
0
Rising edge: Output force truncation
Falling edge: Output force truncation released
1
Rising edge: Output force truncation released
Falling edge: Output force truncation
HS_SEL
Output mode selection for forced truncation
0
Software release
1
Hardware release
REL_SEL
Release timing selection for forced output truncation
0
After the release signal generated by hardware or software occurs, the
truncation is immediately released and the pulse output is restored.
1
After the release signal generated by hardware or software occurs, wait for the
following timing:
Select TO01 as the channel of the source clock: Truncation is released on the
rising edge of the next TO01, and the pulse output is restored
Select TO03 as the channel of the source clock: the cut-off is released on the
rising edge of the next TO03 and the pulse output is restored
Note 1: Set theN_EG at least three clocks apart after the I SC_SEL1 setting, and then set the C_SEL0 and S.
Note 2: Valid only when INTP0 input is selected.
Note 3: When using EVENTC to unenforce the cut-off, software dismiss must be selected (HS_SEL set to 1). There is
no restriction when using I NTP0 input.
Note 4: The effective width of the input selected INTP0 must be greater than one clock cycle.