Cmsemicon CMS32L051 - 4.2 Structure of clock generation circuit

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CMS32L051 User Manual |Chapter 4 Clock Generation Circuit
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4.2 Structure of clock generation circuit
The clock generation circuit consists of the following hardware.
Table 4-1 Structure of the clock generation circuit
item
structure
Control registers
Clock operation mode control register (CMC).
System clock control registers (CKCs).
Clock operating status control registers (CSCs).
Oscillate the status register (OSTC) of the settling time counter
Oscillation settling time selection register (OSTS).
Peripheral enable registers 0, 1 (PE R 0, PE R 1).
Subsystem clock provides a mode control register (OSMC).
Frequency selection register (HOCODIV) for a high-speed internal oscillator
The trimming register (HIOTRM) of the high-speed internal oscillator
Subsystem Clock Selection Register (SUBCKSEL)
Oscillation circuit
X1 oscillation circuit
XT1 oscillation circuit
High-speed internal oscillator
Low-speed internal oscillator