Cmsemicon CMS32L051 - 23.4 Operation of voltage detection circuit

V1.2.2
CMS32L051 User Manual |Chapter 23 Voltage Detection Circuit
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23.4 Operation of voltage detection circuit
23.4.1 Settings when used in reset mode
The operating mode (reset mode (LVIMDS1, LVIMDS0=1, 1)) and the sense voltage (V) are set by option
byte 000C1H LVD). If reset mode is set, operation begins in the following initial state.
0 (disable overriding of the voltage sense
register (LVIS)).
r (LVIS) to 81H. bit7 (LVIMD) is 1 (reset mode).
bit0 (LVILV) is 1 (voltage detection level: VLVD).
 reset mode
When the power is turned on, the reset mode (LVIMDS1, LVIMDS0=1, 1 for option bytes) exceeds the
voltage detection level (V
LVD
) at the supply voltage (V
DD
)) before maintaining the internal reset state of the
LVD. If the supply voltage (V
DD
) exceeds the voltage sense level (VLVD), the internal reset is released.
When the operating voltage drops, an internal reset of the LVD is generated if the supply voltage (V
DD
)
falls below the voltage sense level (V
LVD
).
The timing of the generation of the internal reset signal for the LVD reset mode is shown in
Figure 23-4.