Cmsemicon CMS32L051 - Transmit Buffer Registers (SDRO); Receive Buffer Register (SDRI)

V1.2.2
CMS32L051 User Manual |Chapter 13 Serial Interface SPI
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13.3.4 Transmit buffer registers (SDRO)
This register sets the data to be sent.
When bits 7 (SPIE) and 6 (TRMD) of the serial operating mode register (SPIM) are set to 1, data is written
through SDRO starts sending/receiving.
Serial I/O shift registers convert data from the SDRO from parallel to serial data and output to the serial
output pins.
SDRO can be written or read using 8-bit or 16-bit storage operation instructions.
A reset signal is generated to clear the register to 0000H.
Figure13-4 Format of transmit buffer register (SDRO)
Address: 0x40042408 After reset: 0000HR/W
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SDRO
13.3.5 Receive buffer register (SDRI)
This register stores the received data.
If bit 6 (TRMD) of the serial mode of operation register (SPIM) is set to 0, the reception begins by reading
data from the SDRI.
During reception, data is read from the serial input pins into the SDRI.
The SDRI can be read using 8-bit or 16-bit storage operation instructions.
A reset signal is generated to clear the register to 0000H.
Figure13-5 Format of receive buffer register (SDRI)
Address: 0x4004240C After reset: 0000HR
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SDRI