14.5.2 Address
The next 7 bits of data for the start condition are defined as addresses.
The address is the 7-bit data output by the master device in order to select a specific slave device from
multiple slaves connected to the bus. Therefore, the slave devices on the bus need to set a completely different
address.
The slave detects the start condition through the hardware and checks whether the 7-bit data is the same
as the contents of the slave address register n (SVAn). At this point, if the 7-bit data and the SVAn register have
the same value, the slave is selected to communicate with the master before it generates a start condition or a
stop condition.
Figure 14-15 Address
SCLAn
SDAAn
address
INTIICAn
Note If data other than the local station address or extension code is received at slave runtime, INTIICAn is not
generated.
If the 8-bit data consisting of the slave address and the transfer direction described in "14.5.3 Designation
of transmission direction" is written to the IICA shift register n (IICAn), the address is output. The received
address is written to the IICAn register. The slave address is assigned a high 7 bits in the IICAn register.
14.5.3 Designation of transmission direction
The master device sends 1 bit of data specified in the direction of transmission after the 7-bit address.
When this transmission direction is specified as 0, it means that the master device sends data to the
slave device; When this transmission direction is specified as 1, it means that the master device receives
data from the slave device.
Figure 14-16 Direction of transmission
SCLAn
SDAAn
Specifies the direction of transfer
INTIICAn
Note If data other than the local station address or extension code is received during the slave operation, no INTIICAn is
generated.
Remark n=0
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