Cmsemicon CMS32L051 - Chapter 10 Watchdog Timer; 10.1 Function of watchdog timer; 10.2 Structure of watchdog timer

V1.2.2
CMS32L051 User Manual |Chapter 10 Watchdog Timer
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Chapter 10 Watchdog Timer
10.1 Function of watchdog timer
The counting operation of the watchdog timer is set by the option byte (000C0H). The watchdog timer
operates with a low-speed internal oscillator clock (f
IL
).
A watchdog timer is used to detect a program that is out of control. When a program runaway is detected,
an internal reset signal is generated.
The following situation is judged to be out of control of the program.
 When the watchdog timer's counter overflows
(WDTE) of the watchdog timer
 When writing data other than ACH to the WDTE register
 When writing data to the WDTE register during window closing
When a reset occurs due to a watchdog timer, set bit4 (WDTRF) of the reset control flag register (RESF)
to 1. For more information on RESF registers, refer to Chapter 21 Reset Functions. When 75% of the
overflow time is reached +1/2f
IL
, an interval interrupt can be generated.
10.2 Structure of watchdog timer
The watchdog timer consists of the following hardware.
Table 10-1 Structure of watchdog timer
Item
Structure
Counter
Internal counter (17 bits).
Control registers
Watchdog timer enable register (WDTE)
Control the operation of the counter and set the overflow time, window open period, and interval
interruption through option bytes.
Table 10-2 Option bytes and watchdog timer settings
Setting content of the watchdog timer
Option byte (000C0H)
The setting of the interval interrupt of the watchdog timer
bit7(WDTINT)
The setting during the window opening
bit6 and bit5(WINDOW1, WINDOW0)
Counter run control of the watchdog timer
bit4(WDTON)
The setting of the overflow time of the watchdog timer
bit3~1(WDCS2~WDCS0)
The counter of the watchdog timer runs under control (while
sleeping).
bit0(WDSTBYON)
Note For option bytes, refer to Chapter 26 Option Bytes.