Cmsemicon CMS32L051 - 26.2 Format of user option byte

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CMS32L051 User Manual |Chapter 26 Option Byte
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26.2 Format of user option byte
Figure 26-1 Format of user option bytes (000C0H)
Address: 000C0H
Symbol
7 6 5 4 3 2 1 0
WDTINT
WINDOW1
WINDOW0
WDTON
WDCS2
WDCS1
WDCS0
WDSTBYO
N
WDTINT
Interval interruption of watchdog timer use/non-use
0
Interval interrupts are not used.
1
When 75% of the overflow time is reached +1/2f
IL
, an interval interrupt occurs.
WINDOW1
WINDOW0
The window of the watchdog timer opens during
Note 2
0
-
Disable settings.
1
0
75%
1
1
100%
WDTON
Counter operation control of the watchdog timer
0
Disable the counter to operation (stop counting after resetting is released).
1
Enable the counter to operation (start counting after resetting is released).
WDCS2
WDCS1
WDCS0
Overflow time of the watchdog timer
(f
IL
=20kHz(MAX.))
0
0
0
2
6
/f
IL
(3.2ms)
0
0
1
2
7
/f
IL
(6.4ms)
0
1
0
2
8
/f
IL
(12.8ms)
0
1
1
2
9
/f
IL
(25.6ms)
1
0
0
2
11
/f
IL
(102.4ms)
1
0
1
2
13
/fIL(409.6ms)
1
1
0
2
14
/f
IL
(819.2ms)
1
1
1
2
16
/f
IL
(3276.8ms)
WDSTBYO
N
Counter operation control (sleep mode) for watchdog timers
0
In sleep mode, stop the operation of the counter
Note 1
.
1
In sleep mode, the operation of the counter is allowed.
Note 1 When the WDSTBYON bit is 0, it has nothing to do with the values of the WINDOW1 bit and the WINDOW0 bit,
which is 100% during window open.
Note f
IL: The
clock frequency of the low-speed internal oscillator