CMS32L051 User Manual |Chapter 11 A/D Converter
www.mcu.com.cn 290 / 703
11.4.8 Hardware trigger no-wait mode (scan mode, single conversion mode)
(1) In the stop state, the ADCE bit of the mode register 0 (ADM0) of the A/D converter is 1 and enters
the A/D transition standby state.
(2) After counting the steady wait time (1us) by software, the ADCS bit of the ADM0 register is 1 and
enters the hardware-triggered standby state (this phase does not start the transition). When the
hardware triggers standby, the A/D transition does not start even when the ADCS bit 1 is applied.
(3) If the input hardware triggers in the state where the ADCS bit is 1, scan 0 to 4 of 3 is specified by
the analog input channel specified register (ADS). analog input channels for A/D conversion. A/D
conversion is performed sequentially from the analog input channels specified by Scan 0.
(4) A/D conversion of 4 analog input channels in succession. Whenever the A/D conversion ends, the
conversion results are saved to the A/D conversion result register (ADCR, ADCRH) and an A/D
conversion end interrupt request signal is generated ( INTAD).
(5) After the A/D conversion of the four channels is completed, the ADCS bit remains in the state of 1
and enters the A/D transition standby state.
(6) If the input hardware triggers during the conversion, the current A/D conversion is aborted
immediately and then restarted from the original channel.
(7) If the ADS registers are overwritten or overwritten during the conversion, the current A/D conversion
is aborted immediately and then A/D converted from the original channel respecified by the ADS
registers.
(8) If you rewrite the ADCS bit 1 during the conversion process, the current A/D conversion is aborted
immediately and then the conversion starts again from the original channel.
(9) If the ADCS bit is 0 during the conversion, the current A/D conversion is aborted immediately and
then enters the A/D transition standby. However, in this state, the A/D converter does not enter the
stopped state.
(10) If the ADCE bit is 0 in the A/D transition standby state, the A/D converter enters a stopped state.
When the ADCS bit is 0, even the input hardware trigger is ignored and the A/D conversion does
not begin.
Figure11-23 Timing example of hardware trigger no-wait mode (scan mode, single conversion mode)
set 1 to ADCE bit
generate hardware trigger
hardware trigger
set 1 to ADCS bit
do not accept trigger trigger idle
generate hardware
trigger during A/D
conversion operation
clear ADCE bit to 0
clear ADCS bit to 0
during conversion
do not accept trigger
modify ADS (from ANI0 to
ANI4) during A/D conversion
clear ADCS bit to 0 during
conversion
auto restart
conversion
when
conversion
completes
auto restart
conversion when
conversion completes
auto restart
conversion when
conversion
completes
conversion completes
A/D conversion state
stop
converting
idle
conversion
idle
conversion
conversion
idle
conversion
idle
stop
converting
idle
conversion
4 interrupts generated in 1
complete scan
4 interrupts generated in 1
complete scan
4 interrupts generated in 1
complete scan
To Next Page
Loading...