Cmsemicon CMS32L051 - 3.2 System address partition

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CMS32L051 User Manual |Chapter 3 System Structure
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3.2 System address partition
Figure 3-2 Schematic diagram of address area partition
reserve
Cortex-M0+ specific
resource region for
peripherals
reserve
resource
region for
peripherals
reserve
SRAM
(Max 8KB)
reserve
data flash
1.5KB
reserve
main flash region
(Max 64KB)
FFFF_FFFFH
E00F_FFFFH
E000_0000H
4005_FFFFH
4000_0000H
2000_1FFFH
2000_0000H
0050_05FFH
0050_0000H
0000_FFFFH
0000_0000H