Cmsemicon CMS32L051 - Page 59

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CMS32L051 User Manual |Chapter 3 System Structure
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Peripheral address assignment
Table 3-1 Start addresses of the peripheral's register group
Start address
Peripheral
Remark
0x4000_0000 - 0x4000_4FFF
Reserved
0x4000_5000 - 0x4000_5FFF
DMA
0x4000_6000 - 0x4000_6FFF
Interrupt control
0x4000_7000 - 0x4001_8FFF
Reserved
0x4001_9000 - 0x4001_9FFF
Reserved
0x4001_A000 - 0x4001_FFFF
Reserved
0x4002_0000 - 0x4002_03FF
FLASH control
0x4002_0400 - 0x4002_0FFF
Clock control
0x4002_1000 - 0x4002_1001
Watchdog timer
0x4002_1002 - 0x4002_1800
Reserved
0x4002_1800 - 0x4002_1BFF
High-speed CRC
See Chapter 26: Safety Functions
0x4002_1C00 - 0x4002_1FFF
Clock control
0x4002_2000 - 0x4003_FFFF
Reserved
0x4004_0000 - 0x4004_0FFF
GPIO
0x4004_1100 - 0x4004_19FF
Serial communication unit
0x4004_1A00 - 0x4004_1CFF
Serial interface IICA
0x4004_1D00 - 0x4004_1FFF
Timer array 0
0x4004_2000 - 0x4004_21FF
Timer array 1
0x4004_2200 - ff 0x4004_23
Reserved
0x4004_2FF 400 - ff 0x4004_27
SPI
0x4004_2 FF 800 - 0x4004_31
Reserved
0x4004_3200 - 0x4004_32FF
Generic CRC
See Chapter 26: Safety Functions
0x4004_3300 - 0x4004_33FF
Reserved
0x4004_3400 - 0x4004_37FF
Linkage controller
0x4004_3C00 - 0x4004_3FFF
Reserved
0x4004_4000 - ff 0x4004_43
IrDA
0x4004_4FF 400 - FF 0x4004_47
EPWM
0x4004_4800 - 0x4004_4EFF
Reserved
0x4004_4F00 - 0x4004_4FFF
Real-time clock
0x4004_5000 - 0x4004_53FF
AD converter
0x4004_5400 - 0x4004_5AFF
Reserved
0x4004_5B00 - 0x4004_5BFF
External interrupt control
0x4008_0000 - 0x4008_01FF
Reserved
0x4008_0200 - 0xDFFF_FFFF
Reserved