Cmsemicon CMS32L051 - Voltage Sense Level Register (LVIS)

V1.2.2
CMS32L051 User Manual |Chapter 23 Voltage Detection Circuit
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23.3.2 Voltage sense level register (LVIS)
This is the register that sets the voltage sense level.
The LVIS registers are set via 8-bit memory operation instructions. After the reset signal is generated, the
value of this register becomes 00H/01H/81H
Note 1
.
Figure 23-3 Format of voltage sense level register (LVIS)
Address: 40020442H After reset: 00H/01H/81HNote
1
R/W
symbol
LVIS
LVIMD
Note
2
Operating mode of voltage detection
0
Interrupt mode
1
Reset mode
LVILV
Note
2
LVD detection level
0
High voltage sense level (V
LVDH
).
1
Low voltage detection level (V
LVDL
or V
LVD
).
Note 1. The reset value varies depending on the reset source and option byte settings. When an LVD reset occurs, this
register is not cleared to 00H.
In the event of a reset other than LVD, the value of this register is as follows:


1H
2. You can write 0 only when interrupt & reset mode is selected (the LVIMDS1 bit and LVIMDS0 bits of the option
byte are 1 and 0, respectively) . Cannot be set in other cases. In interrupt & reset mode, value replacement is
performed automatically by generating a reset or interrupt.
Note 1. To override the LVIS registers, the steps of Figure 23-7 and Figure 23-8 must be followed.
2. Select the operating mode of LVD and the detection voltage of each mode (VLVDH, VLVDL, V) by option byte
000C1H LVD). The format of the user option bytes (000C1H/010C1H) is shown in Table 23-1. For more
information about option bytes, refer to Chapter 26, Option Bytes.
7
6 5 4 3 2 1
0
LWeMD
Note2
0
0
0
0
0
0
LVILV
Note2