CMS32L051 User Manual |Chapter 6 Function of EPWM Output Control Circuit
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6.2.5 EPWM force truncated output selection register (EPWMSTL)
The output state of the EPWMO terminal when the EPWMSTL register is forcibly truncated.
The EPWMSTL registers are set via 16-bit memory operation instructions.
After the reset signal is generated, the value of this register becomes 00H.
Figure 6-5 Format of EPWM force truncated output selection register (EPWMSTL)
Selection of terminal output when truncated
Note n: Channel number (n=0~7).
6.2.6 EPWM status register (EPWMSTR)
The EPWMSTR register clears the forced truncation signal and displays the truncation status. If the clear
trigger bit HZCLR is set to 1, the truancy state is released. When the truncation status indicates that the
signal of the SHTFLG is high, it enters the forced truncation state. bit0 is write-only bit, and the read value is
always 0. bit7~1 is read-only.
The EPWMSTR registers are set via 8-bit memory operation instructions.
After the reset signal is generated, the value of this register becomes 00H.
Figure 6-6 Format of EPWM status register (EPWMSTR)
Force truncation status flag
Software clearance to force truncation signals
The software dismisses the truncation state
Note: When the Output Selection Register (EPWMSTL) is set to disable cut-off by forcing truncation, the SHTFLG is set
to 1 because of the input from an external truncation source, but truncation is not performed.