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Cmsemicon CMS32L051 - Setting Window Open Period of Watchdog Timer

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V1.2.2
CMS32L051 User Manual |Chapter 10 Watchdog Timer
www.mcu.com.cn 263 / 703
10.4.3 Setting window open period of watchdog timer
Set the watchdog timer window open by option bytes (000C0H) bit6 and bit5 (WINDOW1, WINDOW0).
The window is summarized as follows:
If you write ACH to the enable register (WDTE) of the watchdog timer while the window is open, the
watchdog timer is cleared and the count is restarted.
During window shutdown, even if ACH is written to the WDTE register, an exception is detected and
an internal reset signal is generated.
Note Only when the WDTE register is written for the first time after the reset is released, regardless of the window
open, as long as the WDTE is written at any time before the overflow time, the watchdog timer is cleared and the
count is restarted.
The window opening period that can be set is shown below.
Table 10-4 Watchdog Timer Settings During Window Open
WINDOW1
WINDOW0
Window open period of watchdog timer
0
-
Disable settings
1
0
75%
1
1
100%
Note When bit0 (WDSTBYON) of option byte (000C0H) is 0, it is independent of the values of WINDOW1 and
WINDOW0 bits. 100% during window open.
Note When setting the overflow time to 2
9
/f
IL,
the window closing time and the open time are as follows.
Setting of window open period
75%
100%
Window close time
0~12.8ms
None
Window open time
12.8~25.6ms
0~25.6ms
< When window open period is 75%>
Overflow time:
2
9
/f
IL
(MAX.)=2
9
/20kHz(MAX.)=25.6ms
Window closing time:
0~2
9
/f
IL
(MIN.) ×(10. 75)=0~2
9
/10kHz×0. 25=0~12.8ms
Window open time:
2
9
/f
IL
(MIN.) ×(10. 75)~2
9
/f
IL
(MAX.)=12.8~25.6ms

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