CMS32L051 User Manual |Chapter 11 A/D Converter
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11.4.2 Software trigger mode (select mode, single conversion mode)
(1) In the stop state, the ADCE bit of the mode register 0 (ADM0) of the A/D converter is 1 and enters
the A/D transition standby state.
(2) After counting the stable wait time (1 us) by software, the ADCS bit of the ADM0 register is 1 for the
register specified by the analog input channel (ADS) specifies the analog input for A/D conversion.
(3) If the A/D conversion ends, the conversion results are saved to the A/D conversion result register
(ADCR, ADCRH) and an A/D conversion end interrupt request signal (INTAD) is generated).
(4) After the A/D conversion is completed, the ADCS bit automatically clears 0 and enters the A/D
transition standby state.
(5) If you override the 1 to the ADCS bit during the conversion, the current A/D conversion is aborted
immediately and the conversion begins again.
(6) If the ADS registers are overwritten or rewritten during the conversion, the current A/D conversion is
aborted immediately, and then the analog inputs respecified by the ADS registers are A/D.
(7) If the ADCS bit is 0 during the conversion, the current A/D conversion is aborted immediately and
then enters the A/D transition standby.
(8) If the ADCE bit is 0 in the A/D transition standby state, the A/D converter enters a stopped state.
When the ADCE bit is 0, even the ADCS set to 1 is ignored and the A/D conversion is not started.
The A/D transition does not start even when the input hardware triggers in the A/D transition standby
state.
Figure11-17 Timing example of software trigger mode (select mode, single conversion mode)
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