CMS32L051 User Manual |Chapter 21 Reset Function
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Chapter 21 Reset Function
The following 7 methods generate a reset signal.
(1) An external reset is entered via the RESETB pin.
(2) An internal reset is generated by a program runaway detection of the watchdog timer.
(3) An internal reset is generated by comparing the supply voltage to the sense voltage of the power-on
reset (POR) circuit.
(4) An internal reset is generated by comparing the supply voltage of the voltage detection circuit (LVD)
with the sense voltage.
(5) Request register bit due to system reset (AIRCR. SYSRESETREQ) is set to 1 to produce an internal
reset.
(6) Internal reset due to RAM parity error.
(7) Internal reset due to access to illegal memory.
Internal reset is the same as external reset, and after a reset signal is generated, the program is executed
from the user-defined program start address.
When a low level is entered into the RESET B pin, or the watchdog timer detects a program runaway, or
detects the voltage of the POR circuit and the LVD circuit, or the system reset request bit is assessed, or a
RAM parity error occurs, or the illegal memory is accessed, A reset is generated and each hardware becomes
a state as shown in Table 21-1.
Note 1 During an external reset, a low level of at least 10us must be entered into the RESETB pin. If an external reset is
performed when the supply voltage rises, the supply must be turned on after the RESETB pin is low and maintained
at least 10u over the operating voltage range shown in the AC characteristics of the user manual s low level, then
enter high.
2. Stop oscillating the X1 clock, XT1 clock, high-speed internal oscillator clock, and low-speed internal oscillator clock
during the reset signal. The inputs to the external master system clock and external subsystem clock are invalid.
3. If a reset occurs, each SFR is initialized so that the port pins become the following state:
receiving the reset (internal pull-up resistors are connected).
orts other than P10, P26, P 40, P137: High impedance during and after receiving a reset.
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