CMS32L051 User Manual |Chapter 16 Enhanced DMA
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16.5 Precautions when using DMA
16.5.1 DMA controls the settings of data and vector tables
•
The DMA Base Address Register (DMABAR) must be changed with all DMA boot sources set to a
state that disables startup.
DMA Base Address Register (DMABAR) can only be overridden once.
The DMAENi0~DMAENi 7 bits must be 0 in the corresponding DMAENi (i=0~2) registers (DMA is
prohibited Startup) when changing DMACRj, DMBLSj, DMACTj, DMRLDj, DMSARj, Data for the DMDARj
register.
The DMAENi0~DMAENi 7 bits must be 0 in the corresponding DMAENi (i=0~2) registers (DMA is
prohibited Start) when setting the starting address of the DMA control data area in the vector table.
16.5.2 DMA controls the allocation of data areas and DMA vector table areas
The areas in which DMA control data and vector tables can be assigned vary depending on the product
and conditions of use.
•
The stack area, DMA control data area, and DMA vector table area cannot overlap.
•
When parity error reset (RPERDIS=0) is allowed to occur via RAM parity error detection function,
the DMRLD register must be initialized even when using normal mode (0 000H).
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