(1) Example of using chain transfer: Continuous A/D conversion result for UART0 transmission
DMA is started by interrupting the end of the A/D conversion, and the A/D conversion result is transferred
to RAM for UART0 transmission.
ults is 20000070H~2000007FH.
20000400H~2000044FH of RAM , and the high bit 1 byte (40045005H) of the A/D conversion result register is
transferred to the send buffer (40041310 of UART 0 H).
Figure 16-21 Example of chain transfer: Continuous A/D conversion results are used for UART0 transmission
DMABAR=20000000H
A/D conversion result control data configuration
vector address (20000005H)=05H
DMACR10(20000070H)=0058H
DMBLS10(20000072H)=0001H
DMACT10(20000074H)=0028H
DMSAR10(20000078H)=40045004H
DMDAR10(2000007CH)=20000400H
DMAEN0=20H
start A/D conversion
A/D conversion completion interrupt?
Yes
DMACT10=01H？
No
No
generate A/D conversion completion interrupt
request
DMAEN1=00H
A/D conversion result register -> RAM transfer
interrupt handling
Yes
internal handling automatically executed by DMA
RAM
A/D conversion result register
20000400H
2000044EH
Setting of control data sent by UART0
vector address (20000009H)=09H
DMACR12(200000B0H)=0000H
DMBLS12(200000B2H)=0001H
DMACT12(200000B4H)=0000H
DMSAR12(200000B8H)=40045005H
DMDAR12(200000BCH)=40041310H
Configura UART0
A/D conversion result register -> UART0 transmit
buffer transfer
A/D conversion result register -> RAM transfer
A/D conversion result register -> UART0 transmit
buffer transfer
UART0 transmit
buffer
To Next Page
Loading...