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Cmsemicon CMS32L051 - Normal Mode

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V1.2.2
CMS32L051 User Manual |Chapter 16 Enhanced DMA
www.mcu.com.cn 593 / 703
16.4.2 Normal mode
In the case of 8-bit transmission, the transmission data for 1 start is 1 to 65535 bytes; in the case of 16-bit
transmission, the transmission data for 1 start is 2 to 131070 bytes; in the case of 32-bit transmission, the
transmission data for 1 start is 4 to 262140 bytes. The number of transmissions is 1 to 65535 times. If the
DMACTj (j=0 to 23) register becomes "0", the interrupt request corresponding to the start-up source is generated
to the interrupt controller during DMA operation, and the DMAENi0 to DMAENi7 bits of the corresponding
DMAENi (i=0 to 2) register are set to "0" (disable start-up).
The register function and data transfer in normal mode are shown in Table 16-7 and Figure 16-15.
Table 16-7 Register function in normal mde
Register name
Symbol
Function
DMA block size register j
DMBLSj
The size of the data block to be transferred by 1
start
DMA transfer count register j
DMACTj
The number of times the data was transmitted
DMA transfer number of times to reload register j
DMRLDj
Not used
Note
.
DMA source address register j
DMSARj
The address of the source of the data
DMA destination address register j
DMDARj
The destination address of the data
Note When parity error reset (RPERDIS=0) is allowed by RAM parity error detection function, initialization (00H) must
be performed.
Note j=0~23
Figure 16-15 Data transfer in normal mode
FFFFFFFH
1The second boot to be delivered
The data block size (N bytes).
DMBLSj register = N
DMSARj register = SRC
DMDARj register = DST
j=23
00000000H
Setting of the DMACR register
Control of the
source address
Control of the
destination address
The source address
after transfer
Destination address
after transfer
DAMOD
SAMOD
RPTSEL
MODE
0
0
X
0
fixed
fixed
SRC
Dst
0
1
X
0
Increasing
fixed
SRC+N
Dst
1
0
X
0
fixed
Increasing
SRC
DST+N
1
1
X
0
Increasing
Increasing
SRC+N
DST+N
X: 0 or 1

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