CMS32L051 User Manual |Chapter 16 Enhanced DMA
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16.4.3 Repeat pattern
The transfer data for one initiation is 1 to 65535 bytes. The source or destination is designated as a
repeat area, and the number of transfers is 1 to 65535 times. Once the specified number of transfers is
complete, initialize the DMACTj(j=0~23) register and the address specified as a repeat, and then repeat
the transfer. This is when the RPTINT bit of the DMACRj register is 1 (interrupts are allowed) and a data
transfer is made where the DMACTj register becomes 0 DMA generates an interrupt request for the
corresponding start source to the interrupt controller during operation, and the DMAENi0~DMAENi7 of
the corresponding DMAENi (i=0~2) registers Position 0 (disable startup). When the RPTINT bit of the
DMACRj register is 0 (interrupt is prohibited), even if the DMACTj register becomes 0 data transfer, no
interrupt requests are generated, and the DMAENi0~DMAENi7 bits are unchanged from 0.
The register function and data transfer of the repeating pattern are shown in Table 16-8 Figure
16-18, respectively.
Table 16-8 Register Functions for Repeat Pattern