Cmsemicon CMS32L051 - 9.2 Structure of clock output;buzzer output controller; 9.3 Registers for controlling clock output;buzzer output controller

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CMS32L051 User Manual |Chapter 9 Clock output/Buzzer Output Controller
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9.2 Structure of clock output/buzzer output controller
The clock output/buzzer output controller consist of the following hardware.
Table 9-1 Structure of clock output/buzzer output controller
Item
Structure
Control registers
Clock output select register n (CKSn).
Port mode control register (PMCxx), port mode register (PMxx),
port multiplexing control register (PxxCFG).
9.3 Registers for controlling clock output/buzzer output controller
9.3.1 Clock output select register n (CKSn)
This is the output that allows or disables the clock output pin or the buzzer frequency output pin
(CLKBUZn) and the register that sets the output clock.
The clock output of the CLKBUZn pin is selected via the CKSn register. The CKSn register is set via an 8-
bit memory operation command. After the reset signal is generated, the value of this register becomes 00H.