CMS32L051 User Manual |Chapter 24 Security Features
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24.3.3 RAM parity error detection function
The IEC60730 standard requires confirmation of RAM data. Therefore, the CMS32L051's RAM
appends 1-bit parity bit every 8 bits. The RAM parity error detection function appends parity bits when
writing data, checks parity bits when reading data, and can produce a reset when parity errors occur.
24.3.3.1 RAM parity error control register (RPECTL)
This register controls the false positive bit of parity and the reset due to parity errors.
The RPECTL registers are set via 8-bit memory operation instructions.
After the reset signal is generated, the value of this register becomes 00H.
Figure 24-7 Format of RAM parity error control register (RPECTL)
Address: 40020425H After reset: 00HR/W
symbol
RPECTL
Note Parity bits are appended when writing data and checked when reading data.
Therefore, to allow RAM parity error reset (RPERDIS=0), the RAM area used must be paired when accessing
the data and before reading the data Initialize.
Because it is running on a pipeline, the CPU performs a pre-read, and a RAM parity error may occur due to the
uninitialized RAM area before reading the RAM area used. Therefore, to allow the generation of RAM parity error
reset (RPERDIS=0), the instructions must be executed from the RAM area to the RAM area used. +10 bytes
area is initialized.
Note 1 The initial state is to allow for parity error reset (RPERDIS=0).
2. Even if the parity error reset is disabled (RPERDIS=1), the RPEF flag is set to 1 in the event of a parity error. If
the RPEF bit is set to allow parity error reset (RPERDIS=0) in the state of 1, the RPERDIS is cleared 0 A parity
error is generated when the reset occurs.
3. Set the RPEF flag of the RPECTL register to 1 due to RAM parity error, and RPEF is reset by writing 0 or all the
reset sources Flag clear 0. When the RPEF flag is 1, the RPEF flag remains in the state of 1 even if the RAM
without parity errors is read.
4. The range of RAM parity detection does not include general-purpose registers.