Cmsemicon CMS32L051 - Master Transmission

V1.2.2
CMS32L051 User Manual |Chapter 12 Universal Serial Communication Unit
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12.5.1 Master transmission
Master transmission refers to the operation of this product output transmission clock and sending data to
other devices.
3-wire serial
I/O
SSPI00
SSPI01
SSPI10
SSPI11
SSPI20
SSPI21
Object
channel
Channel 0 of
SCI0
Channel 1 of
SCI0
Channel 2 of
SCI0
Channel 3 of
SCI0
Channel 0 of
SCI1
Channel 1 of
SCI1
The pin used
SCLK00,
SDO00
SCLK01,
SDO01
SCLK10,
SDO10
SCLK11,
SDO11
SCLK20,
SDO20
SCLK21,
SDO21
interrupt
INTSSPI00
INTSSPI01
INTSSPI10
INTSSPI11
INTSSPI20
INTSSPI21
You can select either a transmit-end interrupt (single-pass mode) or a buffer null interrupt
(continuous transfer mode).
Error
detection flag
not
The length of
the
transmitted
data
7 or 8 bits
Transfer Rate
Note
Max.f
CLK
/2[Hz] (SSPI00 only), f
CLK
/4[Hz]
Min.f CLK/(22
15
×128) [Hz]f×
CLK
: System clock frequency
Data phase
It can be selected via the DAPmn bit of the SCRmn register.
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Clock phase
It can be selected via the CKPmn bit of the SCRmn register.
 CKPmn=0: Normal
 CKPmn=1: Inverted
Data direction
MSB first or LSB first
Note It must be used within the scope of the peripheral functional characteristics that meet this condition and meet the
electrical characteristics (refer to the data sheet).
Remarks m: Unit number (m=0, 1) n: Channel number (n=0~3)mn=00~ 03, 10~11