CMS32L051 User Manual |Chapter 12 Universal Serial Communication Unit
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12.3.7 Serial status register mn (SSRmn)
The SSRmn register indicates the communication status of channel n and the occurrence of errors. The
errors represented are frame errors, parity errors, and overflow errors. The SSRmn register is read via 16-bit
memory operation instructions.
The lower 8 bits of the SSRmn register can be read with SSRmnL and via 8-bit memory operation
instructions.
After the reset signal is generated, the value of the SSRmn register changes to 0000H.
Figure 12-11 Format of serial status register mn (SSRmn) (1/2)
Address: 40041100H (SSR00) ~ 40041106H (SSR03) After reset: 0000HR
40041540H(SSR10)~40041542H(SSR11)
Symbol
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
0
SSRmn
Indication flag for channel n communication status
Communication stop state or communication standby state
Communication operation status
[Clear condition].
When STmn of STm register is set to "1" (communication stopped state) or SSmn bit of SSm register is set to
"1" (communication standby state)
[Set condition].
Indication flag for channel n buffer register
The SDRmn register does not hold valid data.
The SDRmn register holds valid data.
[Clear condition].
register to the shift register is transferred during the transmit
process
from the SDRmn register during the receive process
When the STmn bit of STmn register is set to "1" (communication stopped state) or the SSm bit of the SSm
register is set to "1" (Communication enable state)
[Set condition].
to the SDRmn register in the state where the TXEmn bit of the SCRmn register is 1
(transmit, transmit, and receive modes in each communication mode).
received data is saved to the SDRmn register in the state where the RXEmn bit of the SCRmn
register is 1 (receive mode, transmit and receive modes in each communication mode).
Note 1 For SSR01, SSR03, SSR11 registers only.
Remark m: unit number (m=0, 1) n: channel number (n=0~3).
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